When a processor is interrupted while executing a jump instruction, the address of the next instruction after the jump (not the address where the jump is supposed to go) is typically saved to the stack or the link register (depending on the architecture). Here's why:
When an interrupt occurs, the processor must save the current execution state so that it can resume execution after handling the interrupt. The saved state includes the return address (the address of the instruction where execution will resume after the interrupt).
A jump instruction modifies the program counter (PC) to a new target address. If the interrupt occurs while the jump instruction is being processed: The return address saved on the stack (or link register) is the address of the next instruction after the jump instruction. This ensures that once the interrupt service routine (ISR) is completed, the processor resumes correctly by re-executing the jump if needed or continuing execution as intended.
Saving the address after the jump ensures the state of the program flow is preserved. Interrupts are typically asynchronous, meaning they may not be precisely synchronized with the execution stages of an instruction. By the time the interrupt is handled, the jump may already have been partially or fully executed.
ARM Architecture:
In ARM state, the return address is generally the address of the instruction after the one being executed when the interrupt occurred, saved in the link register (LR). x86 Architecture:
In x86 processors, the current program counter (instruction pointer, EIP/RIP) is pushed onto the stack, which contains the address of the next instruction to execute.
Summary:
The processor saves the address of the instruction after the jump to the stack (or link register) during an interrupt. This ensures proper resumption of execution, preserving program flow integrity.