ARM8 spinlocks test for success on the store-exclusive operation, otherwise they keep spinning. Code copied from another project may spin forever if the CPUs are not in the correct state. In this sense, the answer by Blazej Michalik and comment by artless-noise-bye-due2AI above are straight to the point. I was unable to detect a successful STXR operation until Blazej's three conditions are met, i.e. all cores contending for a store-exclusive spinlock must have their cache and mmu enabled, and the spinlock itself must be located in normal cacheable memory. I was surprised that exclusive locking on ARM8 requires normal cacheable memory (rather than uncached memory). I work aarch64 EL3 on Pi3b+, Pi4 and Pi5, all three platforms behave in the same way.