I would like to reask this question once again.

As I am struggling with the understanding of where overflow comes from in this math operation: ( 0 - (-128) ), while trying to get a clearer understanding of (BRLT A,B) command in AVR ASM.

    ldi temp,  0
    ldi temp1, -128
    sub temp, temp1
    brlt another_part

After that code SREG triggers the next flags: V=1, N=1, C=1. S=(V xor N)=0 and do not fullfil "brlt". Looks logical.

But as soon as I try to understand where this V=1 overflow comes from and think about 0-(-128) my mind breaks:

Should I interpret that as:

1. 0000 0000 + 1000 0000 (128), or as

2. 0000 0000 - 1000 0000 (-128), or as

3. A-B=A+2s.compB (xor(1000 0000) + 1)=1000 0000. As it is smaller than 0, we need to take 2 complement from the result of addition: 0000 0000 + 1000 0000 = 1000 0000, 2s.comp of this result is 1000 0000... ...and only in the third case I could feel some hint for "why" is V=1.. a little.

Could you help me find a solid logical construction for this case of overflow presence in (0 - (-128)) case (in 8 bits), please.

Thanks.