Inline Utility IPs were added in Vivado 2024.2 (I can't see reference to them in 2024.1).

Vivado claims that using these reduces disk usage. I haven't used these yet, but it suggests that they don't get an Out of Context run anymore, and are instead folded into the top level Verilog / VHDL source file that is generated:

https://docs.amd.com/r/en-US/ug994-vivado-ip-subsystems/Inline-HDL

2024.2 and newer will automatically prompt to migrate to these when you open an older project:

https://docs.amd.com/r/en-US/ug994-vivado-ip-subsystems/Migrating-Utility-IPs-to-Inline-HDL