79606114

Date: 2025-05-04 22:21:22
Score: 1.5
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All of this naming confusion and the awkward limitations of the intel vector ISAs is rather normal, as it has developed just by adding stuff without a plan. As Richard Grisentwaithe once said, the intel architecture is an abomination. And I add that nobody that have ever worked on the intel ISA should ever be employed by other companies, unless they want to be poisoned. Just look at the AESNI instructions: the keygenassist instruction does nearly nothing, and to implement one step of the key schedule you still need at least 7 more instructions. WHY? Also, the small round constant is an immediate, so this forces you to unroll the code, which would be not necessary on a modern architecture with good branch prediction. There are countless such examples. Not to speak that the long vectors are there only because the instruction lengths are getting out of hand, whereas a sound Arm implementation can also issue four 128-bit instructions in the same clock cycle.

The sanity of the entire world would improve if the x86 ISAs died a miserable death. It cannot come too quickly.

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Posted by: Mocenigo