In 8086 assembly, the **segment register used is determined by the presence of BP, not the order of operands**.

For effective address `[SI + BP]`, the **SS (Stack Segment)** register is used — because **BP is involved**. Any address calculation using BP or SP implies stack-relative addressing, which defaults to SS.

\> Rule of thumb:

\> - If the effective address uses **BP or SP**, the default segment = **SS**

\> - Otherwise, it's **DS** (Data Segment)

The order `SI + BP` doesn’t change the segment selection logic — the 8086 doesn’t prioritize operands by order, only by type.

### Reference:

Intel 8086 Programmer’s Manual – Effective Address Calculations (EA)

See: [Intel 8086 Docs – Segment Override Defaults](https://www.cs.uaf.edu/2000/fall/cs301/notes/segmentation.html#effective-address)

So your **first instinct was right** — `[SI + BP]` uses SS by default.