May I offer a modest harumph and pose a mildly philosophical question?
class, interface, virtual, pure - surely the English language has more to offer. Yet SystemVerilog insists on shuffling these same tokens into different constructs. Reminds me LEGO of the 70s. Building a dog out 6 bricks.
Has there been any serious thoughts given to incorporating interface class into the UVM base classes, as a formal vehicle for hooks, something like Python’s dunder methods?
It could be rather civilized to have iter(), add() and more, already having copy(), pack(), unpack(), print()... It might introduce a bit of structure and decorum to what otherwise be rather unruly DV code.